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Industry’s first test bench development environment aids analysis and verification of complex analog/mixed-signal designs

SANTA CLARA, Calif., July 23, 2007-- Knowlent Corporation today announced the release of the Opal TBE™ test bench development and simulation control environment that supports all circuit simulation technologies from Synopsys, Inc. Opal TBE will provide Synopsys users with a graphical user interface for analysis, characterization and verification of complex analog/custom blocks used in system-on-chip (SOC) designs implemented in the latest nanometer silicon technologies.

For the first time, Synopsys’ analog and mixed-signal design customers have the advantage of a complete test bench development and simulation control environment launching simulations and post processing simulation results in a structured spec-driven environment. Now, joint customers can take advantage of the complete library of GoldSpec™ test suites for compliance testing of high speed serial interfaces such as SATA, PCIe, SAS, LVDS, XAUI and HDMI ensuring 100 percent compliance of analog blocks to their electrical specifications for that portion of an SOC design. The increased flexibility, performance and accuracy of this integration enable customers to better achieve first-time product success. In addition, Synopsys users can develop device-under-test (DUT) test benches for block-level designs such as ADCs, DACs, OpAmps and PLLs, independently making IP reuse and test bench portability a reality.

"Knowlent’s support of Synopsys’ family of simulators provides an advanced design environment more comprehensive than other environments in the market today,” said Ed Lechner, director, product marketing analog & mixed signal for Synopsys. "Combining our leadership position in circuit simulation technology with Knowlent’s state-of-the-art test bench development environment provides analog/mixed-signal design engineers the “best in class” solution.

“Until now, Synopsys analog/mixed-signal designers used either a command-line interface or third-party tools not optimized for the level of productivity needed to ensure the complete characterization of their designs” said Nelson Seiden Knowlent's vice president of marketing and business development. “We are extremely proud to provide this level of integration with the Synopsys analog/mixed-signal design environment delivering the accuracy, ease-of-use, and functionality designers need to achieve analog signoff and to tape-out with confidence.

About Knowlent Corporation
Located in Silicon Valley, Knowlent Corporation is an Intellectual Property (IP) and Electronic Design Automation (EDA) startup firm providing analog and mixed-signal test bench suites for standard interface specifications such as SATA, PCIe, SAS, LVDS, XAUI and HDMI. For more information and to register for a demo, please visit our website at http://www.knowlent.com.

Synopsys, HSPICE, NanoSim, HSIM and VCS are registered trademarks of Synopsys, Inc. Discovery is a trademark of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners. Knowlent and Opal are trademarks of Knowlent Corporation.

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