The Knowlent product line includes Opal TBE, GoldSpec pre-built test suites and Opal TBB graphical test bench builder…

With Knowlent, analog/mixed-signal designers now have a comprehensive test bench development and debug environment independent of the device under test (DUT), simulator, foundry process or waveform viewer. In addition, they now have a comprehensive environment where IP reuse and test bench portability is now a reality.

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Opal TBE

Opal TBE is a comprehensive simulation control environment which runs analysis and displays compliance and waveform results. Opal TBE generates the appropriate test decks, launches simulations, collects results and displays compliance reports based on the specifications that have been coded into the test benches. Key features of Opal TBE are:

• Simulation management
• Support of most waveform output formats
• Color coded (pass-fail) collated compliance results
• Feature rich debugging capabilities
• Includes native waveform viewer for efficient display of graphical results

Opal TBE provides a rich set of interactive features to help debug results. A specific test run shown in an Opal results table can be interactively analyzed to for insights to the cause of the reported behavior. The tabular interface reads like an electrical datasheet highlighting pass/fail and min/max summary results for each test that appears within the specification. Summary results can be expanded to show detailed results for all simulations. Designers can further pinpoint the failing cycles or time points by viewing waveforms and/or eye diagrams. Opal’s set of interactive debug tools allows the user to do additional design exploration quickly and easily.

Cadence Integration

Opal provides a pull-down menu within Cadence Analog Design Environment (ADE) to connect a circuit to a Knowlent GoldSpec testbench. Import of nodes, pins and supply sources is automatic. This saves time and reduces errors and provides a major productivity boost for designers. Additionally, Opal allows the designer to automatically import process corners and other design variables.

Viper Language

Knowlent developed the Viper test language to quickly and easily build test benches. The Viper language has essential capabilities for analysis and manipulation of analog waveform data using its high-speed waveform database routines.

• Built on open TCL language
• Provides a very rich function set
• Not limited to the pre-built functions
• Any arbitrarily complex function can be created in TCL or Perl or C
• Built-in high value functions for high speed analog IP such as:
• Clock Recovery
• Jitter decomposition into DJ, RJ, PJ
• Pattern extraction and taking actions based on those patterns
• Interpolation
• Bi-quad filtering
• Complex stimulus generation (PWL) including Jitter (Multi tone PJ, DJ, RJ) and arbitrary (Envelope, staircase) arithmetic on PWL or simulation output
• Designed by Analog Engineers for Analog Engineers (we speak the language)
• Unmatched speed and capacity
• 10x speed improvement and 5x capacity improvement over other scripting languages.

Click here for a video introduction to Opal TBE

GoldSpec

Today’s high-speed IC interface standards require a complex set of electrical tests for the verification of that analog interface. With each new generation of protocols running at multi-GHz signal speeds more and more stringent testing is required to ensure that inter-symbol interference is not taking place and that the “eye is not closed.

Knowlent GoldSpec test benches incorporate all the compliance tests and assertions for the electrical specifications of an analog block. With GoldSpec, testing can begin almost immediately. This allows the designer to focus on correcting performance failures instead of building tests to finding them.

GoldSpec test benches are transparent providing visibility into how each test is run. Test benches are editable and can be extended, as desired, using the Perl, Tcl or C programming languages.

Because a GoldSpec testbench can be used early in the design process, the analysis and debug process can be accelerated by up to 10X, ensuring compliance sign-off prior to manufacturing of the silicon. GoldSpec test benches for standard analog interfaces

• 100% spec coverage at electrical level
• Production Proven
• Thoroughly QA’d over diverse design architectures
• Fully portable across foundries, designs, designers and customers
• Simulator independent
• Use with Hspice, Spectre, Eldo, HSim, UltraSim or any other spice
• Check compliance before tape-out
• Also compatible with measured silicon results

GoldSpec pre-built test benches include:

• SATA I,II
• PCIe G1,G2
• LVDS
• XAUI
• HDMI
• SAS

Opal TBB

Opal TBB with its graphical user interface provides a powerful test bench development environment leveraging the powerful Viper test language. Opal TBB provides a rich set of macros making the operators making the Opal TBB includes:

• Automatic, reusable test benches generation
• Template library included
• Easy to use Graphical User Interface
• Interactive test bench debug environment
• Fully-portable test-bench system
• Independent of DUT or Simulator
• Test Bench Templates for common analog blocks including:
  
  
  • Op Amps
  • VCOs/PLLs
  • ADCs/DACs
  • and more
• Automatically generates Viper code eliminating adoption curve ensuring accuracy in test bench development

Click here for a video introduction to Opal TBB

If you would like a product demonstration, call us at 408-748-0600, or email: sales@knowlent.com.

 

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